Post epitaxial thermal oxidation

Details Post epitaxial thermal oxidation Post epitaxial thermal oxidation

1999-01-19

2002-04-16

Elms, Richard (Department: 2824)

Semiconductor device manufacturing: process

Repair or restoration

C438S478000, C438S974000

Reexamination Certificate

active

06372521

ABSTRACT:

TECHNICAL FIELD
This invention relates generally to semiconductor wafer production.
BACKGROUND OF THE INVENTION
In general, semiconductor wafers are prepared in several steps, including (1) growing a single crystal ingot out of molten silicon, (2) sawing the single crystal ingot into wafers, (3) shaping or lapping the wafers, (4) performing a rough polish, and (5) depositing an epi layer of silicon substrate. The epi layer is often deposited using chemical vapor, high temperature deposition to form a single crystal silicon layer on the surface of the wafer. Once the wafers have been prepared, they are provided to a fabrication facility (fab) for further processing.
As fabs are processing smaller and smaller line widths and devices are continually shrinking, the wafer surface effects the entire fab processing. Furthermore, a particle that used to be “invisible” can now completely ruin a device. Also, the surface of an epitaxial wafer exhibits characteristics known as “micro-steps.” Micro-steps occur because the surface of the wafer is crystal and when it is sawed, the surface is dis-oriented with respect to the crystal graphic plains. Therefore, despite the wafers being sawn and polished, the resulting surface has these micro-steps across its surface.
SUMMARY OF THE INVENTION
In response to the problems discussed above, described herein is a system and method for handling post epitaxial thermal oxidation. In one embodiment, the method produces semiconductor wafers by performing the steps of forming a wafer substrate, depositing an epilayer on the substrate, oxidizing a top portion of the epilayer, and removing the oxidized top portion. As a result, the wafer include's an epi-surface that is very smooth, with little or no micro-steps thereon.


REFERENCES:
patent: 3559281 (1971-02-01), Mayberry et al.
patent: 5130268 (1992-07-01), Liou et al.
patent: 53-110459 (1978-09-01), None

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