Method of hard mask patterning

Details Method of hard mask patterning Method of hard mask patterning

2000-02-01

2002-04-23

Utech, Benjamin L. (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

C438S712000, C438S720000, C438S723000, C438S717000

Reexamination Certificate

active

06376379

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to methods of patterning hard masks used in fabrication of semiconductor devices, and specifically to methods of patterning hard masks formed by UV light exposure.
BACKGROUND OF THE INVENTION
Patterning hard masks are used in the fabrication of semiconductor devices to form metal lines, for example.
U.S. Pat. No. 5,910,021 to Tabara et al. describes a method of manufacturing semiconductor devices having fine patterns. A main conductive layer is formed over a substrate and a conductive antireflection layer (TiN, TiON or CrN) is formed over the main conductive layer. A patterned resist mask is formed over the antireflection layer and the antireflection layer is selectively removed by a first etching gas to form a laminated mask of the resist mask and an antireflection mask self-aligned with the resist mask. The main conductive layer is selectively removed through the laminated mask by a second etching gas different from the first etching gas.
U.S. Pat. No. 5,382,544 to Matsummoto et al. describes a method of manufacturing a semiconductor device by the electron beam exposure method. A resist is applied on an interlayer dielectric (ILD) film through a thin metal (Al, AlSiCu, W, silicide, or preferably Ti) film and a contact hole is formed in the interlayer dielectric film. The thin metal film is used as a part of a second metal wiring pattern after removing its surface oxides.
U.S. Pat. No. 5,264,076 to Cuthbert et al. describes a method of integrated circuit fabrication using a layer of spin-on-glass (SOG) as a hard mask for patterning an underlying layer of polysilicon to form gate structures or the like.
U.S. Pat. No. 4,873,163 to Watakaabe et al. describes a photomask material blank, and a method of manufacturing same. The photomask material comprises a transparent substrate and a silicide film of a transition metal formed on the substrate. The metal silicide may be comprised of molybdenum (Mo), tungsten (W), or tantalum (Ta). In an alternate embodiment, a low reflective film comprised of MoO
2
, WO
2
, TiO
2
, or CrO is formed over a silicide film, e.g. a MoO
2
film may be formed over a Mo silicide film.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide an improved method of forming hard masks used in fabrication of semiconductor devices.
Other objects will appear hereinafter.
It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, a semiconductor structure is provided. A conductor film is formed over the semiconductor structure. An oxide layer is formed over the conductor film. A patterned metal oxide layer is formed over the conductor film. The oxide layer and the conductor film are etched, using the metal oxide layer as a hard mask, to form a patterned structure.


REFERENCES:
patent: 4288283 (1981-09-01), Umezaki et al.
patent: 4873163 (1989-10-01), Watakabe et al.
patent: 5055158 (1991-10-01), Gallagher et al.
patent: 5246884 (1993-09-01), Jaso et al.
patent: 5264076 (1993-11-01), Cuthbert et al.
patent: 5382544 (1995-01-01), Matsumoto et al.
patent: 5672243 (1997-09-01), Hsia et al.
patent: 5910021 (1999-06-01), Tabara
patent: 6200907 (2001-03-01), Wang et al.

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