Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2000-10-13
2002-03-12
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S639000
Reexamination Certificate
active
06355549
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to methods of manufacturing semiconductor devices. In particular, the present invention pertains to methods of forming polycide structures in the fabrication of semiconductor devices.
BACKGROUND OF THE INVENTION
As line widths of semiconductor devices decreases, desire for low resistance polycides with low aspect ratios has led to the consideration of various polycide materials other than the conventional tungsten or titanium silicide. For example, such polycide materials may include cobalt silicide, tungsten nitride, and other refractory metal suicides. To use such materials, effective methods for forming polycide structures must be developed.
Cobalt silicide, in particular, due to its low bulk resistivity and small grain size, allows for low resistivity to be preserved for fine line widths of polycide structures. However, cobalt silicide is a difficult material to volatilize and thus dry etch or remove when patterned. As such, the use of different refractory metal silicides for forming polycide structures, in particular, cobalt silicide, has been focused on its use in the salicide process where both transistor gate and source/drain diffusion regions in the active area of devices, such as memory devices, are simultaneously silicided, such as shown in the prior art figures of FIG.
1
A and FIG.
1
B.
As shown in FIG.
1
A and
FIG. 1B
, field oxide regions
17
, gate region
12
including spacers
16
, gate oxide
14
, and polysilicon
18
, and also source and drain regions
22
,
24
, are formed on substrate
10
. A layer of refractory metal, for example cobalt, is deposited such as by sputtering on these previously fabricated regions.
The structure being fabricated is then heated to a temperature at which the refractory metal forms metal silicide regions
26
,
28
, and
30
in the source region
22
, drain region
24
, and with polysilicon
18
of gate region
12
, respectively. Thus polycide line
13
, i.e., a word line including a polysilicon portion
18
and a metal silicided portion
30
, is formed. However, metal silicide is not formed over the oxide regions, such as spacers
16
and field oxide regions
17
. The unreacted refractory metal
20
over such oxide regions, such as spacers
16
and field oxide regions
17
, is then removed. An insulating layer
32
is formed over the structure with a contact hole being formed for connection of a contact
34
to the metal silicide region
30
of polycide word line
13
.
However, in many circumstances, such as in the fabrication of dynamic random access memories, it is undesirable to silicide the source region
22
and drain region
24
. Such undesirability is due to decreased line widths as it is difficult to accommodate such salicided source and drain regions in processes which require minimal gate junction/channel leakage. Such leakage may occur due to source and/or drain diffusion into the junction/channel region of the gate.
A conventional process flow for patterning a polycide line without saliciding the drain or source regions is shown in the prior art
FIGS. 2A-2D
.
FIG. 2A
shows a structure including field oxide regions
42
and gate oxide region
44
isolated in the active area therebetween. As shown in
FIG. 2B
, a polysilicon layer
46
is formed over the field oxide regions
42
and gate oxide
44
followed by a layer of refractory metal
48
, such as cobalt. After the structure, including the polysilicon layer
46
and refractory metal layer
48
, is annealed to form metal silicide layer
47
(FIG.
2
C), such as cobalt silicide, the polycide line
51
(FIG.
2
D), i.e., word line, is patterned using photoresist
50
. The cobalt silicide or metal silicide layer
47
and polysilicon layer
46
are then etched to form the polycide word line
51
including metal silicide region
52
and polysilicon region
53
. Thereafter, spacers may be formed at the walls of the polycide word line. Gate oxide
44
may be etched to form gate oxide region
45
and various implants performed to provide drain and source regions
54
and
56
of the structure as shown in FIG.
2
D. However, the refractory metal reacts with all of the polysilicon layer
46
and not just at the region where the polycide structure is to be formed. As it is difficult to etch some refractory metal silicides, such as, for example, cobalt silicide, due to difficulty of volatilizing and thus dry etching the silicide, this conventional process is problematic.
Accordingly, there is a need in the art for forming polycide structures, such as lines, and in particular, polycide structures utilizing cobalt silicide, which overcomes the difficulty in etching the refractory metal silicide in the formation process. Such a polycide structure formation process should be usable in various processes such as in the formation of a polycide word line or bit line with no need to salicide the drain and source regions of devices being fabricated. The present invention overcomes the problems as described above and overcomes other problems as will become apparent to one skilled in the art from the description below.
SUMMARY OF THE INVENTION
A method of forming a polycide structure in accordance with the present invention includes forming a polysilicon layer on a surface. An oxide hard mask is formed over the polysilicon layer exposing portions of the polysilicon layer and resulting in unexposed portions of the polysilicon layer. A layer comprising refractory metal material is formed over the oxide hard mask and the exposed portions of the polysilicon layer. The layer comprising the refractory metal material and the polysilicon layer are annealed resulting in a refractory metal silicide region of the polycide structure and unreacted refractory metal containing material over the oxide hard mask. The unreacted refractory metal material and oxide hard mask are removed. The unexposed portions of the polysilicon layer are also removed resulting in a polysilicon region of the polycide structure.
In various embodiments of the method, the layer comprising the refractory metal material is cobalt or cobalt silicide. In another embodiment of the method, the removal of the unreacted metal containing material is substantially decoupled from the removal of the unexposed portions of the polysilicon layer.
Another method of forming a polycide line in accordance with the present invention is described. A polysilicon layer is formed on a surface. A refractory metal silicide portion of the polycide line is formed on the polysilicon layer. A polysilicon portion of the polycide line is formed after formation of the metal silicide portion.
In one embodiment of the method, the formation of the metal silicide portion of the polycide line includes forming an oxide hard mask over the polysilicon layer exposing line portions of the polysilicon layer. The exposed line portions of the polysilicon layer are silicided resulting in a refractory metal silicide line portion and unreacted material over the oxide hard mask. The unreacted material and oxide hard mask are then removed.
In another embodiment of the method, siliciding of the exposed line portions of the polysilicon layer include forming a refractory metal or metal silicide over the oxide hard mask and exposed portions of the polysilicon layer. The refractory metal or metal silicide layer is then reacted with the polysilicon layer resulting in the refractory metal silicide portion of the polycide line. In a further embodiment of the invention, the polycide line is of a width less than about 0.25 microns.
In another method of forming a polycide structure in accordance with the present invention, a refractory metal silicide portion of the polycide structure is used as a hard mask to remove portions of an underlying layer of polysilicon to define the polysilicon portion of the polycide structure.
In other methods of the present invention, polycide bit lines, polycide word lines, and polycide interconnects are formed in similar manners as described above.
REFERENCES:
patent: 5047367 (1991-09-01), Wei e
Dang Phuc T.
Mueting Raasch & Gebhardt, P.A.
Nelms David
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