Self align leadframe having resilient carrier positioning means

Metal working – Method of mechanical manufacture – Electrical device making

Reexamination Certificate

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Details

C029S759000

Reexamination Certificate

active

06351883

ABSTRACT:

FIELD OF THE INVENTION
This invention generally relates to integrated circuit chip packaging and in particular relates to the attachment of leadframes to carrier substrates for integrated circuit or semiconductor circuit chip devices. The invention relates to providing a leadframe and method for supporting a carrier and accurately positioning and holding the carrier and aligning the carrier contact pads with the leads of the leadframe so that the leads can be properly and accurately bonded to the contact pads.
BACKGROUND OF THE INVENTION
Packaging of integrated circuit devices is becoming increasingly more difficult and complex in view of the increased number of input/output connections being required for the carrier-mounted chip devices. Multiple hundreds of connections are not uncommon with the accompanying number of leads. One way external connections are provided is to mount a chip on a substrate carrier whereby the contact pads on the chip are aligned with contacts appropriately arranged and typically in a matrix pattern on one side of the carrier. These contacts on the one side of the carrier communicate via conductive traces within the carrier to contacts on the other side of the carrier to which are connected the leads of the leadframe. Alternatively, as permitted by some device designs, the contact pads to be connected to the leadframe could be located on the same side of the carrier to which the chip is mounted. Thus, in the resultant packaged chip device, external leads are electrically connected as required to the chip.
A present process used for attaching a leadframe to a carrier includes the combination of the use of a brazing fixture and visual alignment of the leads of the leadframe and the pads on the carrier. The fixture consists of two parts and both are usually made of a graphite material but could also be made of other materials including ceramic materials. The first part holds a ceramic substrate or carrier and the second part is placed over the first part and holds the leadframe. This arrangement, however, is only able to grossly or coarsely position the leads of the leadframe with respect to the pads on the carrier. This is so because of the differences in coefficients of thermal expansion, amongst the fixtures, the carrier and the leadframe. It has been experienced that there has to be a considerable amount of spatial play built into the various elements amongst the respective fixtures, the carrier and the leadframe in order to accommodate for these thermal mismatches. No way is presently known that fixtures can be built to result in precise alignment of the leads on the leadframe and the pads on the carrier because a considerable amount of play amongst the elements is required when connections are accomplished using silver brazing which requires temperatures of 800° C. to 1000° C. or even at lower temperatures for solder brazing. To accomplish the solder reflow of the pads, the combination of the assembled elements is placed in a furnace. Thus, significant play is required to accommodate the need for the differences in thermal expansion. With the presently known apparatus and process involved, only gross positioning of the various elements is possible and fine positioning results from a visual alignment of the leads and the pads by a human operator. The leads are then bonded to the pads.
DESCRIPTION OF THE PRIOR ART
There are a variety of arrangements known and described in the prior art for attaching leads to an integrated circuit chip device. These include the following patent documents with the accompanying summaries:
U.S. Pat. No. 4,536,825, entitled “Leadframe Having Severable Fingers for Aligning One or More Electronic Circuit Device Components”, which issued Aug. 20, 1985, to Unitrode Corp., describes fixed alignment fingers and positioning tabs on a leadframe for aligning a circuit device with respect to a leadframe.
U.S. Pat. No. 5,275,897, entitled “Precisely Aligned Leadframe Using Registration Traces and Pads”, which issued Jan. 4, 1994, to Hewlett Packard Company, relates to tape automated bonding of leadframes to a substrate and instead of aligning the pattern of signal leads of the frame to the signal leads on the substrate, the focus is on aligning the registration pads on a substrate and the alignment traces on the tape.
U.S. Pat. No. 4,466,183, entitled “Integrated Circuit Packaging Process”, which issued Aug. 21, 1984, to National Semiconductor Corp., is directed to an automatic tape assembly process where an integrated circuit device is assembled to leads on a tape which also provides dummy leads for holding the integrated circuit device prior to testing and encapsulation.
U.S. Pat. No. 5,214,846, entitled “Packaging of Semiconductor Chips”, which issued Jun. 1, 1993, to Sony Corp., relates to packaging of semiconductor chips directly on to leadframes with fingers on the leadframe for restricting movement of the chip with respect to the leadframe.
U.S. Pat. No. 4,651,415, entitled “Leaded Chip Carrier”, which issued Mar. 24, 1987, to Diacon, Inc., relates to a leaded chip carrier and deals with mismatch of thermal coefficient of expansion in the packaging process by use of four separate subframe quadrants and the use of tabs to align between an assembly locating plate and a base plate.
U.S. Pat. No. 5,299,097, entitled “Electronic Part Mounting Board and Semiconductor Device Using the Same”, which issued Mar. 29, 1994, to Ibiden Co. Ltd., pertains to an electronic part mounting board and a semiconductor device which teaches use of four board fixing pins at each corner of leadframe through which press fit pins are inserted to ensure accurate positioning of the leadframe during processing.
U.S. Pat. No. 5,278,447, entitled “Semiconductor Device Assembly Carrier”, which issued Jan. 11, 1994, to LSI Logic Corp., pertains to semiconductor device assembly carrier for supporting and protecting the device and its leads from damage during handling.
U.S. Pat. No. 5,307,929, entitled “Lead Arrangement for Integrated Circuits and Method of Assembly”, which issued May 3, 1994, to North American Specialities Corp., relates to lead arrangements for integrated circuits and describes fold over leadframe retaining tabs for holding and retaining the substrates against the leads during soldering.
BRIEF SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide a new self align leadframe and associated method for attaching leads to a carrier which provide for significant improvements and results over that obtained from the use of the known prior art leadframes and methods previously described.
It is a further object of this invention to provide a new self align leadframe and method for supporting a carrier and attaching leads to contact pads of the carrier without the difficulty in accuracies and expense of using fixtures as is presently done.
According to one aspect of the invention, there is provided an improved leadframe for supporting a carrier for an integrated circuit device and maintaining alignment of contact pads on the carrier with leads of the leadframe, which includes a leadframe circumscribing an area and having a plurality of leads on each side of said frame and extending into the circumscribed area, said carrier having contact pads on one side thereof, said carrier being of the same general shape and size as said area circumscribed by said leadframe such that each of said plurality of leads overlays one of said contact pads. The leadframe further comprises resilient carrier positioning means attached to said leadframe and extending into the circumscribed area such that said positioning means engages the carrier by applying forces against the carrier, thereby supporting the carrier and maintaining each of the contact pads of the carrier in contact and alignment with a respective lead of the leadframe.
According to another aspect of the invention, there is provided a method for attaching leads to contact pads on a carrier for an integrated circuit device wherein said leads are part of a leadframe and said leadframe has

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