Electrical computers and digital processing systems: support – Computer power control
Reexamination Certificate
1999-03-12
2002-03-19
Lee, Thomas (Department: 2787)
Electrical computers and digital processing systems: support
Computer power control
C713S320000, C713S330000, C710S015000, C710S018000
Reexamination Certificate
active
06360327
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
Not applicable.
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not applicable.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to computer systems and particularly to power management in a personal computer system. More particularly, the present invention relates to configuring legacy peripheral devices for low-power mode using a software-based power management system.
2. Background of the Invention
Many personal computer systems conserve energy by operating in special low-power modes when the user is not actively using the system. Although used in desktop and portable systems alike, these reduced-power modes particularly benefit laptop and notebook computers by extending the battery life of these systems. Some computer systems automatically enter low-power mode when a user has not performed a certain action within a given period of time. The computer might power down the monitor if the video display has not recently changed, for example, or may power down the hard drive if the user has not recently opened or saved any files onto the hard disk. If the computer detects a period of inactivity, the computer may enter a deep “sleep” mode in which power is completely cut off to all but a few devices within the computer. In addition, the user often can initiate the sleep mode through a menu in the operating system (OS) or by pressing a power button on the computer. Because the computers random access memory (RAM) remains powered on during sleep mode, the memory contents are preserved so that the computer returns to the same state that it was in when the sleep mode began.
Although these reduced-power modes may render the computer temporarily or partially inoperable, the user can generally restore full-power, or “wake up,” the computer at any time. For example, the computer may automatically restore video power if the user moves the mouse or presses a key on the keyboard, or might power up the hard disk if the user attempts to open or save a file. Many computer systems include a power button that the user can press to wake up the machine from sleep mode. In addition, some computers have the capability to wake automatically in response to incoming phone calls detected by a modem or to wakeup messages received over a local area network (LAN). Sleep mode is often an attractive alternative to completely shutting the computer down, because the computer consumes little power during sleep mode and because waking up from sleep mode typically is much faster than rebooting the system.
Early implementations of the various power modes required the computer hardware itself to monitor user activity and determine the proper power state for each device in the computer system. These early computer systems included a read only memory (ROM) device that stored a set of instructions for the computer to follow in order to carry out power management functions. The set of instructions formed part of the Basic Input/Output System (BIOS) of the computer, which also included instructions for procedures such as accessing data on a hard or floppy disk drive and controlling the graphics display. The ROM device containing the BIOS is referred to as the “BIOS ROM.” Because hardware-based power management instructions usually are included in BIOS, such a management scheme is commonly known as “BIOS power management.” Under BIOS power management, conditions within the computer system that initiate power state transitions, such as button presses and periods of inactivity explained above, generate system management interrupt (SMI) signals to the central processing unit (CPU). Upon receiving an SMI, the CPU executes the BIOS power management instructions stored in ROM to change the power state.
More recently, the Advanced Configuration and Power Interface (ACPI) specification, written collaboratively by Intel, Microsoft, and Toshiba, has introduced the concept of managing power functions using the computer's operating system software (e.g., Windows® 98 and Windows® NT). Centralizing power management within the operating system, in contrast with earlier hardware-based power management techniques, allows computer manufacturers to make simpler, less expensive hardware components that do not have to manage their own power states. Instead, these devices need only to respond to power management commands from the operating system. In general, operating system-based power management enables the computer system to implement relatively complex power management procedures that may have been difficult, if not impossible, to realize using a more decentralized, hardware-based approach. In fact, implementing power control through ACPI, instead of through traditional hardware methods, can significantly reduce the power consumption of some computer systems. Operating system-based power management also provides the user with some level of power management control.
Under ACPI, a computer system can operate in one of six system power states, S
0
, S
1
, S
2
, S
3
, S
4
, and S
5
, which encompass varying levels of system activity ranging from fully operational (S
0
) to “soft off” (S
5
). Power states S
1
-S
5
represent sleeping states, in which the computer system is neither fully operational nor completely powered off. The sleep states generally encompass varying levels of system activity (or “context”) and require different lengths of time (or “wakeup latencies”) to return to full power. Because sleep state S
5
represents the deepest sleep state, it may also be referred to equivalently as the “off” state or as the lowest-power state.
Transitioning between the system power states generally requires cooperation between the operating system and the computer hardware. The computer provides a set of ACPI registers which the operating system can access. To transition to one of the sleep modes from full-power mode (S
0
), the operating system stores special sleep codes into a pair of ACPI control registers. The control registers are known as the PM
1
a
and PM
1
b
Control Registers, and each sleep code includes a sleep enable bit and three sleep-type bits. The sleep-type bits generally identify one of the power states S
1
-S
5
. Upon detecting that the operating system has set (or “asserted”) the sleep enable bit, the computer places itself into a sleep mode as defined by the sleep-type bits.
As stated above, the operating system may direct the hardware to place itself into a sleep mode for a variety of reasons. For example, the computer hardware may provide a timer that expires after a predetermined time of inactivity within the system, prompting the OS to place a sleep request into the sleep-type and sleep enable bits of the control register. Alternatively, the operating system may write a sleep request to the control register after detecting that the user has initiated a sleep mode through the software interface, pressed sleep button on the computer chassis, or simply closed the computer screen (e.g., on a laptop computer). When the sleep enable bit of the control register is asserted, the computer system places itself into the low-power mode indicated by the value of the sleep-type bits.
The ACPI protocol also includes a status register to enable system wakeup. The status register, known as the PM
1
Status Register, includes a wake status bit. The wake status bit typically is set if the user presses a wakeup button or power button on the computer. Certain devices in the computer system, such as the modem or network interface card (NIC), also may cause the wake status bit to be set in response to incoming messages (e.g., phone rings or network “wakeup” messages). When the operating system detects that the wake status bit has been set, the operating system transitions computer operation to the S
0
mode.
To more clearly illustrate transitions between the power modes,
FIG. 1
shows a representative conventional computer system that generally includes a CPU, a main memory array, and a bridge logic device coupling the CPU and main me
Cao Chun
Compaq Information Technologies Group L.P.
Conley & Rose & Tayon P.C.
Lee Thomas
LandOfFree
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