Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-10-03
2002-09-24
Elms, Richard (Department: 2824)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S349000, C257S507000, C438S295000
Reexamination Certificate
active
06455894
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device (SOI device) comprising an SOI (Silicon On Insulator) substrate and a semiconductor element formed on the SOI substrate, and a method of manufacturing the semiconductor device.
2. Description of the Background Art
In recent years, attention has been paid to the SOI device because it can be utilized as a high speed device having low power consumption. The SOI substrate includes a substrate formed of silicon or the like, a buried insulating film such as an oxide film which is formed on the substrate and a silicon layer formed on the buried insulating film. A semiconductor element is formed on at least one of the inner portion or surface of the silicon layer in the SOI substrate. Consequently, the SOI device functions as a semiconductor device.
In recent years, particularly, attention has been paid to a so-called thin film SOI device in which a silicon layer in an SOI substrate has a small thickness of approximately several &mgr;m. The application of the thin film SOI device to an LSI for portable equipment and the like has been expected.
FIG. 45
shows an example of a conventional SOI device. In
FIG. 45
, the reference numeral
1
denotes a substrate constituting the SOI substrate, the reference numeral
2
denotes a buried insulating film constituting the SOI substrate, and the reference numeral
3
a
denotes a part of a silicon layer constituting the SOI substrate. A plurality of MOS transistors TR
1
are formed as an example of the semiconductor element in the silicon layer
3
a
and on a surface thereof. By way of example, the MOS transistor TR
1
is an n-channel type. In order to function as a body region and a channel formation region, the silicon layer
3
a
is provided with a well in which a p-type impurity is injected, for example.
The MOS transistor TR
1
includes a drain region
6
a
and a source region
6
b
which are formed in the silicon layer
3
a
and a gate insulating film
4
a
and a gate electrode
7
a
which are formed on a surface of the silicon layer
3
a.
The gate insulating film
4
a
is an insulating film such as an oxide film, and the gate electrode
7
a
is a conductive film such as polysilicon or a metal film. The silicon layer
3
a
interposed between the drain region
6
a
and the source region
6
b
functions as a body region of the MOS transistor TR
1
. In order to reduce a resistance, silicide regions
9
a,
10
a
and
10
b
such as CoSi or TiSi are formed on surfaces of the gate electrode
7
a,
the drain region
6
a
and the source region
6
b,
respectively. A side wall
8
which has been used for forming an extension region in the drain region
6
a
and the source region
6
b
is formed on a side surface of the gate electrode
7
a.
As an example,
FIG. 45
shows the case in which the drain region
6
a
and the source region
6
b
are provided deeply in contact with the buried insulating film
2
.
Furthermore, an isolating film
5
a
comprising an insulating film such as an oxide film is formed between the MOS transistors TR
1
in order to electrically isolate the elements. The isolating film
5
a
is formed in contact with the buried insulating film
2
perfectly through the silicon layer in order to electrically isolate the elements completely . With such a structure, latch up free is obtained and a tolerance to noises is enhanced. For distinction from a partial isolating film which will be described below, the insulating film will be hereinafter referred to as a complete isolating film.
The MOS transistor formed on an ordinary bulk substrate in place of the SOI substrate is used by applying a body voltage (for example, a ground potential) to the bulk substrate to be a body region. However, in the case of the SOI device shown in
FIG. 45
, each MOS transistor TR
1
is electrically insulated completely from the substrate
1
through the buried insulating film
2
and the complete isolating film
5
a
and the silicon layer
3
a
of the body region is set in an electrical floating state. For this reason, floating-body problems arise, which are negligible in the MOS transistor formed on the bulk substrate.
As one of the floating-body problems, a humup (a bump-shaped step portion) is generated in current-voltage characteristics of a drain-source current Ids and a drain-source voltage Vds, that is, a so-called kink effect is caused.
FIG. 46
is a chart showing the kink effect. As shown in
FIG. 46
, a hump HP is generated in a portion to have a constant current characteristic in a current-voltage characteristic of an ordinary transistor.
It is supposed that the hump HP is generated due to a hole HL accumulated in the vicinity of the source region
6
b
shown in FIG.
47
. The hole HL is generated due to the impact ionization phenomena, and is accumulated in the vicinity of the source region
6
b
and a pn junction between a body and a source is forward biased. If the body voltage is applied to the body region, such a problem arises with difficulty.
Moreover, it is supposed that other causes of the generation of the hump HP include a parasitic bipolar transistor PT shown in
FIG. 47
in which the drain region
6
a,
the source region
6
b
and the silicon layer
3
a
of the body region are set to be a collector, an emitter and a base, respectively. In addition to the kink effect, the parasitic bipolar transistor PT causes a drop in a breakdown voltage between a drain and a source, abnormal sharpness of inclination of subthreshold characteristics, an increase in a current during OFF, a drop in a threshold voltage, the generation of frequency dependency in a delay time and the like. These problems can be solved if the body voltage is applied to the body region.
Recently, a reduction in current drivabilities has also been reported as another floating-body problem (Extended Abstracts of the 1999 International Conference on Solid State Devices and Materials, Tokyo, 1999, pp. 340-341).
In order to solve such a floating-body problem, an impurity concentration of a channel portion in the body region should be increased. However, a rise in the impurity concentration increases a substrate bias effect. Consequently, the current drivabilities are reduced.
In the SOI device, moreover, reliability on hot carriers is also a matter of concern. In the case of the MOS transistor, when the silicon layer of the SOI substrate by has a very small thickness, hot carriers generated in a high electric-field region in the vicinity of a drain region are also injected into a buried insulating film as well as a gate insulating film. Consequently, the device is greatly deteriorated. The problem of the hot carriers is also important for the MOS transistor formed on the bulk substrate. In the MOS transistor formed on the SOI substrate, two insulating films, that is, the gate insulating film and the buried insulating film are provided. Therefore, the problem of the hot carriers is more serious.
In order to solve the floating-body problem and the hot carrier problem described above, it is preferable that an electric potential of the body region should be fixed electrically. In the SOI device shown in
FIG. 45
, each MOS transistor TR
1
is electrically insulated completely from the substrate
1
through the buried insulating film
2
and the complete isolating film
5
a.
With this structure, accordingly, a body terminal connected electrically to the body region should be provided on a surface of the SOI substrate and a body voltage should be applied thereto in order to control the body potential to the silicon layer
3
a
of the body region.
However, if the body terminal is provided on all the MOS transistors in an integrated circuit, a circuit area is greatly increased.
Consequently, it has been proposed that a partial isolating film which does not reach the buried insulating film is employed in place of the complete isolating film
5
a.
If the isolating film does not reach the buried insulating film, it is sufficient that one body terminal should be provided on the
Hirano Yuuichi
Iwamatsu Toshiaki
Matsumoto Takuji
Elms Richard
Mitsubishi Denki & Kabushiki Kaisha
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Wilson Christian D.
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