Soldermask opening to prevent delamination

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

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Details

C361S748000, C361S736000, C174S13800J, C174S260000

Reexamination Certificate

active

06356452

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to printed circuit boards production and, in particular, to the processes utilized to create printed circuit boards.
BACKGROUND OF THE INVENTION
A typical printed circuit board is a flat board that provides support and electrical interconnection between microchips and other electronic components. The base of the board can be made of reinforced fiberglass or plastic, and the electronic components are electrically interconnected by conductive pathways. There are several ways to make printed circuit boards. One method entails bonding a conductive foil, such as copper, over the base. A conductive pattern is then formed in the conductor. One method of patterning the metal layer uses a negative image of the desired circuit pattern and a photo resist layer. The photo resist is activated using the image such that selected areas of the photo resist can be removed. An etch process is then performed to remove the photo resist that was not activated and the underlying metal layer, leaving behind the conductive pathway pattern.
Today, most printed circuit boards are composed of several sheets or layers. A multi-layer printed circuit board may be fabricated from several composite sheets, each comprising a substrate of insulating material and a layer of metal, such as copper, attached to one surface of the substrate using a resin. A desired conductive pathway pattern is then provided in the metal layer, as explained, and multiple layers of insulating material and metal conductor layers can be fabricated. A soldermask layer can be provided over the top level of conductor to control areas exposed to a soldering process. A finished printed circuit board can then put through an assembly process where it is populated with various electrical components.
Delamination, or separation, problems have been discovered in the printed circuit board assembly industry regarding processes similar to the one described above. These problems are a result of the various environmental stresses inherent to assembly procedures. For example, delamination of the soldermask layer can occur when moisture retained by a board's constituent components are exposed to post-production assembly processes performed at high temperatures.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need for a multi-layer printed circuit board assembly that reduces the likelihood of delamination.
SUMMARY OF THE INVENTION
The above mentioned problems with circuit board assemblies and other problems are addressed by the present invention and which will be understood by reading and studying the following specification.
In one embodiment, a circuit board comprises a base layer, and a conductive layer located on a first side of the base layer. The conductive layer is patterned into conductive traces. A soldermask layer is located on a surface of the conductive layer and a region of the first side of the base layer which is not covered by the conductive layer. The soldermask layer is provided with a first plurality of openings to expose the base layer to provide ventilation, and wherein the soldermask layer is further provided with a second plurality of openings to expose the conductive traces.
In another embodiment, a circuit board assembly comprises a base layer, and a conductive layer located on top of the base layer. The conductive layer is patterned to form conductive traces. A soldermask is attached over the conductor layer and the base layer. The soldermask layer includes a first plurality of openings to expose a top surface of the base layer and a second plurality of openings to expose areas of the conductors. An integrated circuit is also attached to a first side of the circuit board.


REFERENCES:
patent: 4801069 (1989-01-01), Ankrom et al.
patent: 4840305 (1989-06-01), Ankrom et al.
patent: 4847446 (1989-07-01), King et al.
patent: 4912020 (1990-03-01), King et al.
patent: 5214845 (1993-06-01), King et al.
patent: 5519580 (1996-05-01), Natarajan et al.
patent: 5617990 (1997-04-01), Thompson, Sr.
patent: 5704535 (1998-01-01), Thompson, Sr.
patent: 5724720 (1998-03-01), Tuttle
patent: 5739585 (1998-04-01), Akram et al.
patent: 5796590 (1998-08-01), Klein
patent: 5851899 (1998-12-01), Weigand
patent: 5852870 (1998-12-01), Freyman et al.
patent: 5872338 (1999-02-01), Lan et al.
patent: 5900273 (1999-05-01), Rasmussen et al.
patent: 5915749 (1999-06-01), Baldwin
patent: 5930889 (1999-08-01), Klein
patent: 5945729 (1999-08-01), Stroupe
patent: 5949141 (1999-09-01), Farnworth et al.
patent: 5981314 (1999-11-01), Glenn et al.
patent: 6069028 (2000-05-01), Stroupe
patent: 6084297 (2000-07-01), Brooks et al.
patent: 6085962 (2000-07-01), Jacobsen et al.
patent: 6124637 (2000-09-01), Freyman et al.
patent: 6150193 (2000-11-01), Glenn

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