Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2000-04-13
2002-05-07
Clark, Jhihan B (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S697000, C257S698000, C257S786000, C257S724000, C361S736000, C361S748000, C361S784000
Reexamination Certificate
active
06384476
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor integrated circuit having a plurality of electrode pads disposed in an array-like form on the bottom surface thereof, and a printed wiring substrate having the semiconductor integrated circuit mounted thereon.
2. Related Background Art
In recent years, the circuit scale of a semiconductor intergrated circuit has grown larger and larger. As the circuit scale of the semiconductor integrated circuit has grown larger, the number of pins necessary for the connection of the integrated circuit and an external circuit has been increased and therefore, an IC package having a plurality of electrode pads disposed in an array-like form on the bottom surface thereof has been developed. Since it is a semiconductor integrated circuit, the electrode pads disposed in an array-like form on the bottom surface thereof include a power supply electrode pad for supplying a power source to this semiconductor integrated circuit, and a pad for a ground for connecting this semiconductor integrated circuit to the ground potential (ground) on the external circuit side. Heretofore, in the semiconductor integrated circuit having a plurality of electrode pads provided in an array-like form on the bottom surface thereof, the disposition of the power supply electrode pad and the electrode pad for a ground has been determined with the ease of the circuit design of the semiconductor integrated circuit, the allowable current value of an output buffer for an output signal, etc. taken into account, and the positional relationship between the power supply electrode pad and the electrode pad for a ground has not particularly been taken into consideration.
When the above-described prior-art semiconductor integrated circuit having the array-like electrode pads is mounted on a printed wiring substrate, the position of a decoupling capacitor disposed on the printed wiring substrate becomes far from the power supply electrode pad and the electrode pad for the ground of the semiconductor integrated circuit or interferes with the latter by the geometrical disposition with other wiring pattern, depending on the wiring pattern of the printed wiring substrate side, because the positions of the power supply electrode pad and the electrode pad for the ground of the semiconductor integrated circuit are predetermined by only the convenience of the semiconductor integrated circuit side and therefore, it becomes difficult to dispose decoupling capacitors relative to individual power supply electrode pads and electrode pads for the ground.
Therefore, when as represented by recent CPU's and microprocessors, the higher speed of the operating frequency of the semiconductor integrated circuit is remarkably progressing, there arises the problem that the radiation noise of electromagnetic waves from the printed wiring substrates having mounted thereon the semiconductor integrated circuit having the array-like electrode pads or an electronic apparatus carrying them thereon is increased and the standard for the unnecessary radiation noise regulated in various countries cannot be met.
SUMMARY OF THE INVENTION
It is an object of the present invention to solve the above-noted problem and to provide a semiconductor integrated circuit having the arrangement of array-like electrode pads which can effectively dispose a decoupling capacitor when a semiconductor integrated circuit having a plurality of electrode pads disposed in an array-like form on the bottom surface thereof is mounted on a printed wiring substrate.
It is another object of the present invention to provide a semiconductor integrated circuit of a construction in which a plurality of ground electrode pads and a plurality of power supply electrode pads are constructed as groups and they are disposed in the central portion with the groups opposed to each other to thereby suppress the creation of radiation noise.
Other objects of the present invention will become apparent from the following detailed description of some specific embodiments of the present invention.
REFERENCES:
patent: 4153988 (1979-05-01), Doo
patent: 5798571 (1998-08-01), Nakajima
patent: 5847451 (1998-12-01), Ohtaki et al.
patent: 6057596 (2000-05-01), Lin et al.
patent: 6207476 (2001-03-01), Zhao et al.
patent: 6225702 (2001-05-01), Nakamura
patent: 5--82735 (1993-05-01), None
Canon Kabushiki Kaisha
Clark Jhihan B
Fitzpatrick ,Cella, Harper & Scinto
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