Efficient system bootstrap loading

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Details

C711S154000, C711S122000

Reexamination Certificate

active

07386678

ABSTRACT:
An efficient system for bootstrap loading scans cache lines into a cache store queue during a scan phase, and then transmits the cache lines from the cache store queue to a cache memory array during a functional phase. Scan circuitry stores a given cache line in a set of latches associated with one of a plurality of cache entries in the cache store queue, and passes the cache line from the latch set to the associated cache entry. The cache lines may be scanned from test software that is external to the computer system. Read/claim dispatch logic dispatches store instructions for the cache entries to read/claim machines which write the cache lines to the cache memory array without obtaining write permission, after the read/claim machines evaluate a mode bit which indicates that cache entries in the cache store queue are scanned cache lines. In the illustrative embodiment the cache memory is an L2 cache.

REFERENCES:
patent: 5895487 (1999-04-01), Boyd et al.
patent: 2003/0126379 (2003-07-01), Kaushik et al.
patent: 2006/0294309 (2006-12-01), Guthrie et al.
Catcling Values in the Load Store Queue.

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