Methods for creating primitive constructed standard cells

Details Methods for creating primitive constructed standard cells Methods for creating primitive constructed standard cells

2008-03-11

2008-03-11

Whitmore, Stacy (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07343581

ABSTRACT:
A high-level logic description is developed based on a non-primitive-based standard cell library. The logic description is synthesized into a netlist that includes references to the non-primitive-based standard cell library. A logic function for each standard cell in the netlist is determined and mapped into a set of primitive logic cells to create a primitive constructed version of each referenced standard cell. The set of primitive logic cells is defined for integration within a base array. The primitive constructed version of each referenced standard cell is included within a primitive-based cell library. The primitive-based cell library is used to place and route the netlist for the logic design for integration within the base array. The logic design is then integrated within the base array.

REFERENCES:
patent: 5726902 (1998-03-01), Mahmood et al.
patent: 5841663 (1998-11-01), Sharma et al.
patent: 6051031 (2000-04-01), Shubat et al.
patent: 6272671 (2001-08-01), Fakhry
patent: 6463576 (2002-10-01), Tomoda
patent: 6490715 (2002-12-01), Moriwaki et al.
patent: 6536028 (2003-03-01), Katsioulas et al.
patent: 2003/0042930 (2003-03-01), Pileggi
patent: 2003/0149953 (2003-08-01), Whitaker et al.
patent: 2004/0243966 (2004-12-01), Dellinger
patent: 2006/0112355 (2006-05-01), Pileggi
patent: 2006/0253827 (2006-11-01), Karniewicz
patent: 2007/0033547 (2007-02-01), Chen et al.
Authors: Chetan Patel, Anthony Cozzie, Herman Schmit, Larry Pileggi, Title: An Architectural Exploration of Via Patterned Gate Arrays, ISPD 2003, Date: Apr. 6, 2003, pp. 184-189, City/Country: Monterey, California, USA.
Author: Vyacheslav V. Rovner, Title: Design for Manufacturability in Via Programmable Gate Arrays, Masters Thesis, Date: May 2003, Publisher: Graduate School of Carnegie Mellon University, City/Country: Pittsburgh, Pennsylvania, USA.
Authors: K.Y. Tong, V. Kheterpal, V. Rovner, L. Pileggi, H. Schmit, R. Puri, Title: Regular Logic Fabrics for a Via Patterned Gate Array (VPGA), Custom Integrated Circuits Conference. Proceedings of the IEEE, Date: Sep. 2003, pp. 53-56.
Authors: Fan Mo, Robert K. Brayton, Title: Checkerboard: A Regular Structure and its Synthesis, International Workshop on Logic and Synthesis, Date: May 2003.
Authors: Aneesh Koorapaty, Lawrence Pileggi, Herman Schmit, Title: Heterogeneous Logic Block Architectures for Via-Patterned Programmable Fabrics, 13thInternational Conference on Field Programmable Logic and Applications (FPL) 2003, Lecture Notes in Computer Science (LNCS), Date: Sep. 2003, vol. 2778, pp. 426-436, City/Country: Berlin, Germany.
Authors: L. Pileggi, H. Schmit, A.J. Strojwas, P. Gopalakrishnan, V. Kheterpal, A. Koorapaty, C. Patel, V. Rovner, K.Y. Tong, Title: Exploring Regular Fabrics to Optimize the Performance-Cost Trade-Off, Proceedings of the 40thACM/IEEE Design Automation Conference (DAC) 2003, Date: Jun. 2003, pp. 782-787, Publisher: ACM Press, City/Country: Anaheim, California, USA.
Authors: Aneesh Koorapaty, Lawrence Pileggi, Title: Modular, Fabric-Specific Synthesis for Programmable Architectures, 12thInternational Conference on Field Programmable Logic and Applications (FPL) 2002, Lecture Notes in Computer Science (LNCS), Date: Sep. 2002, vol. 2438, pp. 132-141.
Authors: Yajun Ran, Marek-Sadowska, Title: Designing a Via-Configurable Regular Fabric, Custom Integrated Circuits Conference (CICC). Proceedings of the IEEE, Oct. 2004, Date: Oct. 2004, pp. 423-426.
Authors: Yajun Ran, Malgorzata Marek-Sadowska, Title: The Magic of a Via-Configurable Regular Fabric,. Proceedings of the IEEE International Conference on Computer Design (ICCD), Oct. 2004, Date: Oct. 2004.
Authors: Yajun Ran, Malgorzata Marek-Sadowska, Title: On Designing Via-Configurable Cell Blocks for Regular Fabrics, Proceedings of the Design Automation Conference (DAC) 2004, Date: Jun. 2004, pp. 198-203, Publisher: ACM Press.

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