Semiconductor integrated circuit device

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

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C365S230040

Reexamination Certificate

active

07382670

ABSTRACT:
There is disclosed a semiconductor integrated circuit device having first and second load circuits for write. At the time of an all bit-stress test, a high voltage for write is supplied from the first and second load circuits for write to the all bit lines. At the time of an even bit-stress test, the high voltage for write is supplied from the first load circuit for write to the even bit lines and a lower potential than the high voltage for write is supplied from the second load circuit for write to the odd bit lines. At the time of an odd bit-stress test, the lower potential is supplied from the first load circuit for write to the even bit lines and the high voltage for write is supplied from the second load circuit for write to the odd bit lines.

REFERENCES:
patent: 6304504 (2001-10-01), Chevallier et al.
patent: 6930938 (2005-08-01), Yasuda
patent: 7009897 (2006-03-01), Sakemi
patent: 7123528 (2006-10-01), Jeong et al.
patent: 2003/0235093 (2003-12-01), Kawano
patent: 2006/0018167 (2006-01-01), Jeong et al.

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