Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2008-01-08
2008-01-08
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S158000, C718S102000
Reexamination Certificate
active
07318128
ABSTRACT:
Mechanisms and techniques operate in a multiprocessing computer system having a plurality of processing devices and provide an affinity-based wakeup locality successor selection process that can identify processes to be executed by a kernel by detecting when a first process executing on a first processing device releases access to shared data. In response to the first process releasing access to the shared data, embodiments attempt to identify a second process that i) formerly executed on the first processing device and that ii) is awaiting access to the shared data. Embodiments provide, to a kernel responsible for selecting processes to execute amongst the plurality of processing devices, an identification of the second process as a process that is ready for execution in the multiprocessing computer system. Such embodiments can operate in an execution environment such as a Java Virtual Machine.
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Bataille Pierre-Michel
Chapin IP Law LLC
Chapin, Esq. Barry W.
Sun Microsystems Inc.
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