Memory card having a storage cell and method of controlling...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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C711S103000, C711S170000, C711S171000, C711S172000, C711S173000, C365S230010

Reexamination Certificate

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07392343

ABSTRACT:
A controller comprises a host interface section and a processing circuit. The host interface section receives a command sequence outputted from a host apparatus to a first nonvolatile semiconductor memory. The processing circuit processes the command sequence outputted from the host apparatus to the first nonvolatile semiconductor memory, and controls writing, reading and erase of data to a second nonvolatile semiconductor memory, according to the command sequence.

REFERENCES:
patent: 5799168 (1998-08-01), Ban
patent: 6480947 (2002-11-01), Hasegawa et al.
patent: 6650593 (2003-11-01), Takemae
patent: 6823417 (2004-11-01), Spencer
patent: 6931582 (2005-08-01), Tamura et al.
patent: 2003/0225962 (2003-12-01), Hirosawa
patent: 2006/0064537 (2006-03-01), Oshima
patent: 2002-259322 (2002-09-01), None
patent: 571243 (2004-01-01), None
U.S. Appl. No. 11/690,367, filed Mar. 23, 2007, Oshima et al.
U.S. Appl. No. 258325US2S, filed Sep. 3, 2004, inventor Hiroshi Sukegawa.

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