Memory updater using a control array to defer memory operations

Details Memory updater using a control array to defer memory operations Memory updater using a control array to defer memory operations

2008-06-24

2008-06-24

Sough, Hyung S (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S121000, C711S146000, C711S150000, C711S151000, C711S154000, C711S155000, C711S165000, C711S170000, C714S006130

Reexamination Certificate

active

07392346

ABSTRACT:
A memory having multiple locations for data storage is updated by performing the following method. The memory locations are grouped into commonly accessible groups of one or more data locations. First, a control array is provided. The control array is associated with a predetermined type of memory update operation, and has a local indicator for each commonly accessible group of memory locations respectively. Next, the instruction stream to the memory is monitored to determine the current memory operation type, and the set of groups of memory locations upon which the current operation is to be performed. If the current memory operation is an operation of the predetermined type, the control array is updated. If the current operation is an operation other than the predetermined type, the state of the respective local indicator of each group of the set is determined. The current operation is then performed upon each group in the set in accordance with the state of its respective local indicator. Embodiments permit following instructions to be processed as if the deferred memory operation were performed in a single cycle, even before the memory itself is updated.

REFERENCES:
patent: 5353410 (1994-10-01), Macon et al.
patent: 6434669 (2002-08-01), Arimilli et al.
patent: 2002/0129211 (2002-09-01), Arimilli et al.

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