Method for manufacturing multi-thickness gate dielectric...

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S724000, C438S745000

Reexamination Certificate

active

07323420

ABSTRACT:
In a method for manufacturing a multi-thickness gate dielectric layer of a semiconductor device, a first dielectric layer is formed on a semiconductor substrate. A second dielectric layer is formed using a different dielectric material from the material constituting the first dielectric layer on the first dielectric layer. A portion of the second dielectric layer is selectively removed so as to selectively expose the first dielectric layer under the second dielectric layer. A portion of the exposed first dielectric layer is selectively removed so as to selectively expose the semiconductor substrate under the exposed first dielectric layer. Thereafter, a third dielectric layer having a thinner thickness than the first dielectric layer is formed on the exposed semiconductor substrate. As a result, a gate dielectric layer is formed to include a thick portion formed of the first dielectric layer and remaining second dielectric layer, a medium-thickness portion formed of the remaining first dielectric layer, and a thin portion formed of the third dielectric layer.

REFERENCES:
patent: 5128274 (1992-07-01), Yabu et al.
patent: 5811336 (1998-09-01), Kasai
patent: 6087236 (2000-07-01), Chau et al.
patent: 6303521 (2001-10-01), Jenq
patent: 6383861 (2002-05-01), Gonzalez et al.
patent: 6436771 (2002-08-01), Jang et al.
patent: 6461973 (2002-10-01), Hui et al.
patent: 6566213 (2003-05-01), En et al.
patent: 6583013 (2003-06-01), Rodder et al.
patent: 6756635 (2004-06-01), Yasuda et al.
patent: 6867445 (2005-03-01), Jang
patent: 7179750 (2007-02-01), Kim et al.
patent: 2002/0119615 (2002-08-01), Kim et al.
patent: 2003/0102504 (2003-06-01), Chem et al.
patent: 2003/0214001 (2003-11-01), Yasuda et al.
patent: 2004/0023451 (2004-02-01), Lee et al.
patent: 2004/0061527 (2004-04-01), Knee
patent: 2004/0113229 (2004-06-01), Gonzalez et al.
patent: 2004/0132253 (2004-07-01), Hori

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