Semiconductor device and method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S294000, C257S500000, C257SE21380, C257SE21625, C257SE21639

Reexamination Certificate

active

07989896

ABSTRACT:
A method of fabricating a semiconductor device according to one embodiment includes: laying out a first region, a second region, a third region and a fourth region on a semiconductor substrate by forming an element isolation region in the semiconductor substrate; forming a first insulating film on the first region and the second region; forming a first semiconductor film on the first insulating film; forming a second insulating film and an aluminum oxide film thereon on the fourth region after forming of the first semiconductor film; forming a third insulating film and a lanthanum oxide film thereon on the third region after forming of the first semiconductor film; forming a high dielectric constant film on the aluminum oxide film and the lanthanum oxide film; forming a metal film on the high dielectric constant film; forming a second semiconductor film on the first semiconductor film and the metal film; and patterning the first insulating film, the first semiconductor film, the second insulating film, the aluminum oxide film, the third insulating film, the lanthanum oxide film, the high dielectric constant film, the metal film and the second semiconductor film.

REFERENCES:
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patent: 2009/0194821 (2009-08-01), Kaneko et al.
Narayanan, et al., “Band-Edge High-Performance High-κ/Metal Gate n-MOSFETs using Cap Layers Containing Group IIA and IIIB Elements with Gate-First Processing for 45 nm and Beyond”, 2006 Symposium on VLSI Technology Digest of Technical Papers, pp. 224-225, (Jun. 2006).
Yamamoto, et al., “Study of La Concentration Dependent VFBShift in Metal/HfLaOx/Si Capacitors”, Extended Abstracts of the 2006 International Conference on Solid State Devices and Materials, pp. 212-213, (Sep. 2006).
Kubicek, et al., “Strain enhanced Low-VTCMOS featuring La/AI-doped HfSiO/TaC and 10ps Invertor Delay”, 2008 Symposium on VLSI Technology Digest of Technical Papers, pp. 130-131, (Jun. 2008).
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