Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2008-05-27
2008-05-27
Le, Thong Q. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S194000, C365S230010
Reexamination Certificate
active
07379357
ABSTRACT:
A semiconductor device for comparing an input address with a repair address includes a signal controller for generating control signals. An address latch unit in response to the control signals latches the address. Each of N number of M-bit address comparators compares the address with the stored repair address. A comparator delay modeling block delays the control signal for a predetermined time, i.e., delay value of the M-bit address comparator. A repair circuit controller in response to the delayed control signal output from the comparator delay modeling block generates one of a repair address enable signal and a normal address enable signal based on a comparison result of the M-bit address comparator.
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Blakely , Sokoloff, Taylor & Zafman LLP
Hynix / Semiconductor Inc.
Le Thong Q.
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