Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2011-08-09
2011-08-09
Alphonse, Fritz (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S786000, C714S803000
Reexamination Certificate
active
07996747
ABSTRACT:
A Forward Error Correction (FEC) code compatible with the self-synchronized scrambler used by the 64B/66B encoding standard for transmission on Serializer/Deserializer (SerDes) communications channel links. The FEC code allows encoding and decoding to occur before and after scrambling, respectively, so as to preserve the properties of the scrambling operation on the transmitted signal. The code allows the correction of any single transmission error in spite of the multiplication by three of all transmission errors due to the 64B/66B scrambling process. A Hamming code is combined with a Bit Interleaved Parity code of degree n (BIP-n). These two codes provide for protection both for an error anywhere in the maximum length of the packet as well as for an error replicated two or three times by the descrambling process. All single bit errors, whether multiplied or not, have unique syndromes and are therefore easily correctable. In addition, the packet can be transported across multiple serial links for higher bandwidth applications without a degradation of the code efficiency. The Hamming code can be generated from any irreducible polynomial, such as H(x)=x10+x3+1. The BIP code is chosen to be of degree 6 to fit with 64B/66B scrambling polynomial and is represented by B(x)=x6+1.
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Dell Timothy
Glaise Rene
Alphonse Fritz
International Business Machines - Corporation
LeStrange Michael J.
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