Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2008-03-18
2008-03-18
Kerveros, James C. (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
Reexamination Certificate
active
07346816
ABSTRACT:
A method for testing a memory includes a test pattern generated by a hash algorithm. The test pattern is written into the memory and then is read from the memory. Next, the hash algorithm generates a signature using the test pattern read from the memory. Subsequently, the memory is verified by comparing the signature to a reference signature.
REFERENCES:
patent: 4715034 (1987-12-01), Jacobson
patent: 6732306 (2004-05-01), Dover et al.
patent: 2006/0034453 (2006-02-01), Liu
Kerveros James C.
Lowe Hauptman & Ham & Berner, LLP
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