Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
2008-04-01
2008-04-01
Tan, Vibol (Department: 2819)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S104000, C710S118000, C710S305000, C326S086000, C326S046000
Reexamination Certificate
active
07353308
ABSTRACT:
In a bi-directional, self-synchronous bus for communication between semiconductor devices, a logic delay is provided as a flag to a state machine control for indicating that the bus is making a transition from a low to a high state. The logic delay causes the bus to adaptively idle until the bus settles, making it amenable for a wide variety of bus sizes and topologies. In this way, oscillation of the bus is avoided without slowing the speed of the state machine clock.
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Barus Daniel J.
Behrendt Eileen M.
Biamonte Jeffrey R.
Harrington Raymond J.
Trifilo Timothy M.
Breedlove, Esq. Jill M.
Esq. Lily Neff
Heslin Rothenberg Farley & & Mesiti P.C.
International Business Machines - Corporation
Tan Vibol
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