Semiconductor device having silicide reaction blocking region

Details Semiconductor device having silicide reaction blocking region Semiconductor device having silicide reaction blocking region

2008-04-29

2008-04-29

Vu, Hung (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S384000, C257S408000

Reexamination Certificate

active

07365404

ABSTRACT:
A semiconductor device has a silicon substrate, an n-type well region formed in the silicon substrate, first and second source/drain regions constructed of a p-type diffusion layer formed on the n-type well region, a gate insulator formed in a region located between the first source/drain region and the second source/drain region and a polysilicon formed on the gate insulator. The semiconductor device has oxygen-rich layers for blocking a silicide reaction, which layers are formed in an uppermost portion of the silicon substrate on the side of the polysilicon, and has an oxygen-rich layer for blocking the silicide reaction, which layer is formed in an upper portion of the polysilicon.

REFERENCES:
patent: 5923070 (1999-07-01), Yamada
patent: 7112856 (2006-09-01), Cho et al.
patent: 5-326552 (1993-12-01), None
patent: 9-64349 (1997-03-01), None
patent: 10-178171 (1998-06-01), None
patent: 10-261588 (1998-09-01), None
patent: 2001-203346 (2001-07-01), None
patent: 2002-190590 (2002-07-01), None

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