Method of programming and sensing memory cells using...

Details Method of programming and sensing memory cells using... Method of programming and sensing memory cells using...

2011-08-02

2011-08-02

Lam, David (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185280, C365S185270

Reexamination Certificate

active

07990769

ABSTRACT:
A first channel in the substrate underlying a trap gate is biased to cause trapping of holes or electrons in the trap gate and thereby program the memory device to a programmed state. A second channel in the substrate underlying the trap gate and transverse to the first channel is biased to sense the programmed state. For example, biasing a first channel in the substrate underlying the trap gate to cause trapping of holes or electrons in the trap gate and thereby program the memory device to a programmed state may include applying voltages to a first source/drain region and first gate on a first side of the trap gate and to a second source/drain region and a second gate on a second side of the trap gate, and biasing a second channel in the substrate underlying the trap gate and transverse to the first channel to sense the programmed state may include applying voltages to a third source/drain region on a third side of the trap gate and to a fourth source/drain region on a fourth side of the trap gate.

REFERENCES:
patent: 7075144 (2006-07-01), Kim
patent: 7447082 (2008-11-01), Wang et al.
patent: 2005-051227 (2005-02-01), None
patent: 1019990061345 (1999-07-01), None
patent: 1020070010923 (2007-01-01), None

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