Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...
Reexamination Certificate
2011-03-29
2011-03-29
Kim, Kenneth S (Department: 2111)
Electrical computers and digital processing systems: processing
Processing architecture
Microprocessor or multichip or multimodule processor having...
C710S306000, C712S028000, C712S033000
Reexamination Certificate
active
07917729
ABSTRACT:
A System-on-Chip (SoC) component comprising a single independent multiprocessor subsystem core including a plurality of multiple processors, each multiple processor having a local memory associated therewith forming a processor cluster; and a switch fabric means connecting each processor cluster within an SoC integrated circuit (IC). The single SoC independent multiprocessor subsystem core is capable of performing multi-threading operation processing for SoC devices when configured as a DSP, coprocessor, Hybrid ASIC, or network processing arrangements. The switch fabric means additionally interconnects a SoC local system bus device with SoC processor components with the independent multiprocessor subsystem core.
REFERENCES:
patent: 4633394 (1986-12-01), Georgiou et al.
patent: 4751634 (1988-06-01), Burrus, Jr. et al.
patent: 4829511 (1989-05-01), Georgiou
patent: 4929939 (1990-05-01), Varma et al.
patent: 4952930 (1990-08-01), Franaszek et al.
patent: 5056058 (1991-10-01), Hirata et al.
patent: 5166674 (1992-11-01), Baum et al.
patent: 5189314 (1993-02-01), Georgiou et al.
patent: 5229994 (1993-07-01), Balzano et al.
patent: 5535373 (1996-07-01), Olnowich
patent: 5586273 (1996-12-01), Blair et al.
patent: 5798918 (1998-08-01), Georgiou et al.
patent: 5838935 (1998-11-01), Davis et al.
patent: 5905873 (1999-05-01), Hartmann et al.
patent: 5931933 (1999-08-01), Billheimer et al.
patent: 6032245 (2000-02-01), Georgiou et al.
patent: 6038630 (2000-03-01), Foster et al.
patent: 6055581 (2000-04-01), Berglund et al.
patent: 6215412 (2001-04-01), Franaszek et al.
patent: 6260088 (2001-07-01), Gove et al.
patent: 6262594 (2001-07-01), Cheung et al.
patent: 6331977 (2001-12-01), Spaderna et al.
patent: 6385748 (2002-05-01), Chen et al.
patent: 6405289 (2002-06-01), Arimilli et al.
patent: 6651131 (2003-11-01), Chong et al.
patent: 6662253 (2003-12-01), Gary et al.
patent: 6678535 (2004-01-01), Narayanaswami
patent: 6721313 (2004-04-01), Van Duyne
patent: 7093258 (2006-08-01), Miller et al.
patent: 2001/0042147 (2001-11-01), Adams et al.
patent: 2001/0047465 (2001-11-01), Liu
patent: 2002/0172197 (2002-11-01), Dale et al.
patent: 2002/0176402 (2002-11-01), Karim
patent: 2002/0184419 (2002-12-01), Creedon et al.
patent: 2003/0046492 (2003-03-01), Gschwind et al.
patent: 2003/0067913 (2003-04-01), Georgiou et al.
patent: 2003/0067930 (2003-04-01), Salapura et al.
patent: 2003/0105906 (2003-06-01), Zhao
patent: 10-506492 (1998-06-01), None
patent: 2001-506781 (2001-05-01), None
patent: WO 97/04401 (1997-02-01), None
patent: WO 98/28695 (1998-07-01), None
“Motorola intelligence everywhereTM digital dnaTM”, Fact Sheet MPC8560 Powerquicctm Integrated Communications Processor, Motorola, Inc, 2002.
Nair, R. “Effect of increasing chip density on the evolution of computer architectures”, IBM J. Res. & Dev., vol. 46, No. 2/3, Mar./May 2002, pp. 223-234.
Berry, “System-On-Chip Markets and Trends”, Electronic Trend Publications, Inc. San Jose, CA, Second Edition, 2003, pp. 1-1-5-2.
Almasi, et al., “Dissecting Cyclops: A Detailed Analysis of a Multithreaded Architecture”, RC 22243 (98713) Apr. 1, 2002, pp. 1-15.
Georgiou, et al., “A Programmable Scalable Platform for Next Generation Networking”, Proceedings of 2nd Network Processor Workshop, NP2, in conjunction with HPCA-9, Feb. 2003, Anaheim, CA, pp. 1-9.
IBM Corporation: “IBM introduces PowerPC 440 embedded processor”, http://www-3.ibm.com/chips
ews/2003/0922—440ep.html; last printed Sep. 20, 2006; pp. 1-2.
IBM Corporation: “CoreConnect bus architecture”, 3.ibm.com/chips/products/coreconnect/; last printed Sep. 20, 2006; pp. 1-2.
ARM: “The Architecture for The Digital World”, http://www.arm.com/armtech/cpus?OpenDocument; last printed Sep. 20, 2006; pp. 1-2.
Georgiou Christos J.
Gregurick Victor L.
Salapura Valentina
Abate Esq. Joseph P.
International Business Machines - Corporation
Kim Kenneth S
Scully , Scott, Murphy & Presser, P.C.
LandOfFree
System on chip IC with subsystem of multiple processing... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System on chip IC with subsystem of multiple processing..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System on chip IC with subsystem of multiple processing... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2779017