Method and apparatus for a low-density parity-check decoder

Details Method and apparatus for a low-density parity-check decoder Method and apparatus for a low-density parity-check decoder

2008-07-08

2008-07-08

Baker, Stephen M. (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S780000

Reexamination Certificate

active

07398453

ABSTRACT:
A low-density parity-check (LDPC) decoder (304) has a memory (308), and a processor (306). The processor is programmed to initialize (202) the LDPC decoder, calculate (204) a probability for each check node, calculate (206) a probability for each bit node, calculate soft decisions, update the bit nodes according to the calculated soft decisions, calculate (208) values from the calculated soft decisions, perform (210) a parity check on the calculated values, update (218) log-likelihood ratios (LLRs) if a bit error is detected in the calculated values, update the bit nodes according to the updated LLRs, and repeat the foregoing post initialization steps.

REFERENCES:
patent: 6594318 (2003-07-01), Sindhushayana
patent: 6757337 (2004-06-01), Zhuang et al.
patent: 6829308 (2004-12-01), Eroz et al.
patent: 6895547 (2005-05-01), Eleftheriou et al.
patent: 6954832 (2005-10-01), Suzuki et al.
patent: 7000167 (2006-02-01), Coker et al.
patent: 7023936 (2006-04-01), Sutskover et al.
patent: 7149953 (2006-12-01), Cameron et al.
Chung, Sae-Young et al.: “Analysis of Sum-Product Decoding of Low-Density Parity-Check Codes Using a Gaussian Approximation”, IEEE Transactions on Information Theory, vol. 47, No. 2, Feb. 2001, pp. 657-670.
IEEE 802.20 Working Group on Mobile Broadband Wireless Access, <http://grouper.ieee.org/groups/802./20;>, Initial Contribution on a System Meeting MBWA Characteristics, IEEE C802.20-03/16, Mar. 6, 2003, pp. 1-49.
Gallager, R.G.: Low-Density Parity-Check Codes, IRE Transactions on Information Theory, 1962, pp. 21-28.
Intel LDPC Code Technical Description, Eric Jacobsen, Apr. 11, 2004, VO.2.
Kschischang, Frank R. et al.: “Iterative Decoding of Compound Codes by Probability Propagation in Graphical Models”, IEEE Journal on Selected Areas in Communications, vol. 16, No. 2, Feb. 1998, pp. 219-230.
Jacobsen, Eric: LDPC FEC for IEEE 802.11n Applications, doc.: IEEE 802.11-03/0865r1, Intel Labs Communications Technology Laboratory, Nov. 10, 2003, slides 1-35.
Richardson, Thomas J. et al.: “The Capacity of Low-Density Parity-Check Codes Under Message-Passing Decoding”, IEEE Transaction on Information Theory, vol. 4, No. 2, Feb. 2001, pp. 599-618.
Richardson, Thomas J. et al.: “Design of Capacity-Approaching Irregular Low Density Parity-Check Codes”, IEEE Transactions on Information Theory, vol. 47, No. 2, Feb. 2001, pp. 619-637.
Richardson, Thomas J. et al.: “Efficient Encoding of Low-Density Parity-Check Codes”, IEEE Transactions on Information Theory, vol. 47, No. 2, Feb. 2001, pp. 638-656.
Mackay, David J. C.: “Good Error-Correcting Codes Based on Very Sparse Matrices”, IEEE Transactions on Information Theory, vol. 45, No. 2, Mar. 1999, pp. 399-431.

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