Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Differential sensing

Reexamination Certificate

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Details

C365S205000, C365S154000, C365S063000

Reexamination Certificate

active

07903490

ABSTRACT:
The present invention provides a semiconductor memory device in which the number of write amplifiers is decreased by increasing the number of bit line pairs connected to one pair of common write data lines. Further, by decreasing the number of bit line pairs connected to one pair of common read data lines, parasitic capacitance connected to the pair of common read data lines is reduced and, accordingly, time in which the potential difference between the pair of common read data lines increases is shortened. Thus, while preventing enlargement of the chip layout area, read time can be shortened.

REFERENCES:
patent: 5544109 (1996-08-01), Uchida et al.
patent: 5724292 (1998-03-01), Wada
patent: 6381167 (2002-04-01), Ooishi et al.
patent: 6411559 (2002-06-01), Yokozeki
patent: 6724675 (2004-04-01), Funyu et al.
patent: 6795332 (2004-09-01), Yamaoka et al.
patent: 2001-344965 (2000-06-01), None
patent: 2002-368135 (2001-06-01), None

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