Predicting IC manufacturing yield by considering both...

Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing

Reexamination Certificate

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Details

C714S030000, C257S048000, C382S141000, C382S149000, C382S151000, C382S154000

Reexamination Certificate

active

08000826

ABSTRACT:
One embodiment of the present invention provides a system that predicts manufacturing yield for a die within a semiconductor wafer. During operation, the system first receives a physical layout of the die. Next, the system partitions the die into an array of tiles. The system then computes systematic variations for a quality indicative value to describe a process parameter across the array of tiles based on the physical layout of the die. Next, the system applies a random variation for the quality indicative parameter to each tile in the array of tiles. Finally, the system obtains the manufacturing yield for the die based on both the systematic variations and the random variations.

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