Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2008-05-06
2008-05-06
Lindsay, Jr., Walter (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S941000, C438S230000, C257SE21623, C257SE21637
Reexamination Certificate
active
07368372
ABSTRACT:
The invention includes methods of fabricating multiple sets of field effect transistors. In one implementation, an etch stop layer is formed over an insulative capping layer which is formed over a conductive gate layer formed over a substrate. The etch stop layer, the insulative capping layer, and the conductive gate layer are patterned and etched to form a first set of conductive gate constructions over the substrate. A dielectric material is formed and planarized over the first set of gate constructions. Thereafter, the insulative capping layer and the conductive gate layer are patterned and etched to form a second set of conductive gate constructions over the substrate. Other aspects and implementations are contemplated.
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Fishburn Fred D.
Roberts Martin Ceredig
Lindsay, Jr. Walter
Micro)n Technology, Inc.
Well St. John P.S.
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