Synchronous semiconductor memory device which can be inspected e

Details Synchronous semiconductor memory device which can be inspected e Synchronous semiconductor memory device which can be inspected e

1999-01-07

2000-12-19

Elms, Richard

Static information storage and retrieval

Read/write circuit

Testing

36523003, 36523004, 365233, G11C 700

Patent

active

061634913

ABSTRACT:
A synchronous semiconductor memory device includes a prefetch selector receiving first and second data respectively read from first and second memory cells corresponding to even and odd addresses for outputting them to a data input/output terminal. The prefetch selector sequentially outputs first and second data to the data input/output terminal in one period of a clock period in the normal operation, determines if the first and second data match in a test mode, and outputs the determination result to the data input/output terminal in one period of the clock period.

REFERENCES:
patent: 5764590 (1998-06-01), Iwamoto et al.
patent: 5798979 (1998-08-01), Toda et al.
patent: 5812490 (1998-09-01), Tsukude
patent: 5892730 (1999-04-01), Sato et al.
patent: 5926434 (1999-07-01), Mori
patent: 5946266 (1999-08-01), Iwamoto et al.
"A 640MB/s Bi-Directional Data Strobed, Double-Data-Rate SDRAM with a 40mW DLL Circuit for a 256MB Memory System", by C. Kim, et al, 1998 IEEE International Solid State Circuits Conference, pp. 158-159.

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