Trench isolation method with an epitaxially grown capping layer

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S435000, C438S424000, C257SE21546

Reexamination Certificate

active

07319062

ABSTRACT:
A trench isolation method for a semiconductor device, wherein a capping layer formed of an insulating material fills a recess generated at a border edge between an active area and an inactive area. The border edge is defined by a trench filled with insulating material. Filling the recess suppresses defects of the semiconductor device. Reduction of the isolating ability, due to the formation of gate poly residue during the forming of a gate, is prevented. Reduction of the threshold voltage of a transistor, caused by electric field concentration due to the gate poly residue, is suppressed. An oxide layer is also provided which protects an nitride pad during a plasma process.

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