Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1999-09-22
2000-12-19
Elms, Richard
Static information storage and retrieval
Read/write circuit
Bad bit
G11C 700
Patent
active
061634905
ABSTRACT:
Defective memory is programmed to have a contiguous address space by dividing the logical address space of the memory into a plurality of address sections. The address section containing the address mapped to a defective memory location is identified. The physical memory locations originally mapped to the addresses in the identified address section are remapped to addresses in an address section at one end of the address space. The addresses in the end address section are disabled. Alternatively, spare memory is provided and the addresses in the end address section are remapped to physical locations in the spare memory. A similar remapping procedure is applied to repair defective data paths in a memory. The remapping procedure is applicable to memory devices or memory modules.
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Akram Salman
Cloud Eugene H.
Keeth Brent
Shaffer James M.
Elms Richard
Micro)n Technology, Inc.
Phung Anh
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