Semiconductor device and timing control circuit

Static information storage and retrieval – Read/write circuit – Signals

Reissue Patent

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Details

C365S233100, C327S158000, C327S161000

Reissue Patent

active

RE040205

ABSTRACT:
delete-start id="DEL-S-00001" date="20080401" ?Control on the speed of operation of a delay loop from the output of a variable delay circuit to a delay control input thereof is performed. For example, frequency-dividing circuits are respectively placed at the input and output of the variable delay circuit. A signal obtained by frequency-dividing a signal outputted from the variable delay circuit is supplied to one input of a phase comparator through a dummy delay circuit, and a signal obtained by frequency-dividing the input of the variable delay circuit is supplied to the other input of the phase comparator. Phase control is performed according to the result of comparison between the phases of both signals.delete-end id="DEL-S-00001" ?insert-start id="INS-S-00001" date="20080401" ?Control on the speed of operation of a delay loop from the output of a variable delay circuit to a delay control input thereof is performed. For example, frequency-dividing circuits are respectively placed at the input and output of the variable delay circuit. A signal obtained by frequency-dividing a signal outputted from the variable delay circuit is supplied to one input of a phase comparator through a dummy delay circuit, and a signal obtained by frequency-dividing the input of the variable delay circuit is supplied to the other input of the phase comparator. Phase control is performed according to the result of comparison between the phases of both signals.insert-end id="INS-S-00001" ?

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JPO Notice of Reason of Refusal dated Oct. 26, 2007, in Japanese with English translation.

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