Optical alignment loops for the wafer-level testing of...

Details Optical alignment loops for the wafer-level testing of... Optical alignment loops for the wafer-level testing of...

2008-05-27

2008-05-27

Hollington, Jermele M (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

Reexamination Certificate

active

07378861

ABSTRACT:
This application describes, among others, wafer designs, testing systems and techniques for wafer-level optical testing by coupling probe light to/from the top of the wafer. A wafer level test system uses an optical probe to search for and align with an optical alignment loop. The test system uses a located alignment loop as a reference point to locate other devices on the wafer. The test system tests the operation of selected devices disposed on the wafer. The alignment loop is also used as a reference device for an adjacent device of unknown performance.

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