Systems and methods for scheduling memory requests utilizing...

Details Systems and methods for scheduling memory requests utilizing... Systems and methods for scheduling memory requests utilizing...

2008-04-29

2008-04-29

Kindred, Alford (Department: 2181)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S105000

Reexamination Certificate

active

07366854

ABSTRACT:
In an embodiment, a memory scheduler is provided to process memory requests. The memory scheduler may comprise: a plurality of arbitrators that each select memory requests according to age of the memory requests and whether resources are available for the memory requests; and a second-level arbitrator that selects, for an arbitration round, a series of memory requests made available by the plurality of arbitrators, wherein the second-level arbitrator begins the arbitration round by selecting a memory request from a least recently used (LRU) arbitrator of the plurality of arbitrators.

REFERENCES:
patent: 5535395 (1996-07-01), Tipley et al.
patent: 5805854 (1998-09-01), Shigeeda
patent: 6507886 (2003-01-01), Chen et al.
patent: 6629220 (2003-09-01), Dyer
patent: 2001/0010066 (2001-07-01), Chin et al.
Affidavit of Richard W. Adkisson, Feb. 17, 2005, 4 pages.

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