Pillar grid array package

Details Pillar grid array package Pillar grid array package

2008-05-06

2008-05-06

Lee, Hsien-Ming (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

C257S690000, C257S777000, C257S787000, C257SE23001, C438S107000, C438S126000, C438S127000

Reexamination Certificate

active

07368809

ABSTRACT:
A pillar grid array package (PGA) includes a substrate, a chip disposed on top of the substrate, and a plurality of stud bumps disposed on bottom of the substrate. The stud bumps are formed in an array and each has a flattened top to electrically connect to a printed circuit board, PCB, by an anisotropic conductive paste to achieve a thin package and to avoid substrate warpage problems of a ball grid array (BGA) during high-temperature reflow processes.

REFERENCES:
patent: 6335271 (2002-01-01), Fukuyama
patent: 6602733 (2003-08-01), Iwahashi et al.
patent: 2002/0053730 (2002-05-01), Mashino
patent: 2003/0116866 (2003-06-01), Cher 'Khng et al.

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