Process for manufacturing a memory device integrated on a...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257SE29129, C257SE21422, C438S257000

Reexamination Certificate

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07910978

ABSTRACT:
An embodiment of a process is disclosed herein for fabricating a memory device integrated on a semiconductor substrate and comprising at least a nanocrystal memory cell and CMOS transistors respectively formed in a memory area and in a circuitry area. According to an embodiment, a process includes forming a nitride layer having an initial thickness, placed above a nanocrystal layer, in the memory area and the formation in the circuitry area of at least one submicron gate oxide. The process also provides that the initial thickness is such as to allow a complete transformation of the nitride layer into an oxide layer at upon formation of said at least one submicron gate oxide.

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patent: 5714766 (1998-02-01), Chen et al.
patent: 6784103 (2004-08-01), Rao et al.
patent: 6958265 (2005-10-01), Steimle et al.
patent: 7012297 (2006-03-01), Bhattacharyya
patent: 2004/0232478 (2004-11-01), Kim et al.
patent: 2006/0046384 (2006-03-01), Joo et al.

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