Techniques to reduce transmitted jitter

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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C375S373000, C370S516000

Reexamination Certificate

active

07324620

ABSTRACT:
A re-timer system that may include a phase recoverer (“PR”), first-in-first-out device (“FIFO”) and retime clock multiplication unit (“CMU”). PR may receive an input signal that suffers from jitter. PR may generate a phase matched signal having substantially the same phase as that of the input signal. To generate the phase matched signal, PR may use a clock signal provided by a single side band oscillator, CMU, or a clock signal having substantially the same level of jitter as that of the input signal to generate the phase matched signal. FIFO may sample the phase matched signal and store such samples. CMU may request and output samples from the FIFO at a frequency determined by a reference clock signal.

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