Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Differential sensing

Reexamination Certificate

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C365S185170

Reexamination Certificate

active

07911864

ABSTRACT:
A semiconductor memory device includes a memory cell array in which a plurality of memory cells are arranged in a matrix, a read unit which reads out data from the memory cells in the memory cell array, a write unit which writes data in the memory cells in the memory cell array, a read voltage generating unit which generates a read voltage and supplies the read voltage to the read unit, and a voltage control unit which controls the read voltage in accordance with temperatures.

REFERENCES:
patent: 6643193 (2003-11-01), Yamaki et al.
patent: 7009881 (2006-03-01), Noguchi
patent: 7411830 (2008-08-01), Takeuchi et al.
patent: 7729165 (2010-06-01), Wang
patent: 2007/0036016 (2007-02-01), Takeuchi et al.
patent: 2006-196078 (2006-07-01), None
patent: 10-2007-0079111 (2007-08-01), None
patent: 10-2007-0080037 (2007-08-01), None

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