Method of testing nonvolatile memory device

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

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Details

C365S200000

Reexamination Certificate

active

08004914

ABSTRACT:
A method includes performing test bit setting; programming a first page using data set by the test bit setting, and storing a fail status bit in a page buffer, which is connected to a first bit line having a fail status, based on a verification result of the test program; performing a test program and verification on a second page based on a test program and fail status bit storage result of a preceding page, and storing a fail status bit in the page buffer, which is connected to a second bit line having a fail status, based on a verification result of the test program and verification; and after a test program, verification, and fail status bit setting with respect to the entire pages of a memory block are completed, outputting data of the page buffer.

REFERENCES:
patent: 7558114 (2009-07-01), Lee et al.
patent: 7567460 (2009-07-01), Chae et al.
patent: 7609553 (2009-10-01), Hwang
patent: 2004/0240268 (2004-12-01), Kim et al.
patent: 2005/0162918 (2005-07-01), Kim et al.
patent: 2006/0053353 (2006-03-01), Youn et al.
patent: 2007/0025159 (2007-02-01), Lee et al.
patent: 2009/0040836 (2009-02-01), Lee
patent: 2009/0231927 (2009-09-01), Cha et al.
patent: 2010/0195401 (2010-08-01), Jeong et al.
patent: 1020060092329 (2006-08-01), None
patent: 1020060124009 (2006-12-01), None
patent: 1020070105141 (2007-10-01), None
Notice of Allowance issued from Korean Intellectual Property Office on Nov. 6, 2009.

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