Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2011-08-30
2011-08-30
Pham, Hoai V (Department: 2892)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S108000, C257SE21499
Reexamination Certificate
active
08008120
ABSTRACT:
A peeling off layer18is formed on an entire surface of one surface side of a support plate10including the inner wall surfaces respectively of a recessed part12for an electronic part and recessed parts16for posts in which the posts20are formed. Then, the recessed parts16are filled with metal to form the posts20. Then, conductor patterns28are formed that electrically connect the electrode terminals22aof the electronic part22inserted into the recessed part12to the posts20. Then, an insulating layer covering the conductor patterns28is formed to form an electronic part package30on the one surface side of the support plate10through the peeling off layer18. After that, the electronic part package30is separated from the support plate10by the peeling off layer18.
REFERENCES:
patent: 6586822 (2003-07-01), Vu et al.
patent: 6701614 (2004-03-01), Ding et al.
patent: 2009/0124043 (2009-05-01), Bae et al.
Higashi Mitsutoshi
Sakaguchi Hideaki
Sunohara Masahiro
Drinker Biddle & Reath LLP
Pham Hoai v
Shinko Electric Industries Co. Ltd.
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