Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2011-04-26
2011-04-26
Chu, Chris (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257SE23174, C257S686000, C257S724000, C257S730000, C438S109000, C361S736000
Reexamination Certificate
active
07932605
ABSTRACT:
There is disclosed a semiconductor device comprising at least one semiconductor element, one chip mounting base being provided at least one first interconnection on one major surface thereof and at least one second interconnection on the other major surface thereof, and the semiconductor element being electrically connected to at least the one first interconnection and mounted on the one major surface, a sealing member being provided on the one major surface of the chip mounting base and covering the semiconductor element and the first interconnection, at least one third interconnection being provided on a surface of the sealing member, and at least one fourth interconnection being provided in the sealing member and the chip mounting base, and electrically connected to the first interconnection, the second interconnection, and the third interconnection.
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Decision on Rejection issued by Japanese Patent Office, mailed Jun. 26, 2007, in Japanese Application No. 2004-136255 and English translation.
Notification of Reasons for Rejection from Japanese Patent Office mailed Mar. 22, 2006, in Japanese Application No. 2004-136255, and English translation thereof.
Imoto Takashi
Takubo Chiaki
Chu Chris
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
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