Dual gate lateral diffused MOS transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S328000, C257S343000, C257S344000, C257S345000, C257SE21418, C257SE29256, C438S212000, C438S268000, C438S282000

Reexamination Certificate

active

07910991

ABSTRACT:
A disclosed power transistor, suitable for use in a switch mode converter that is operable with a switching frequency exceeding, for example, 5 MHz or more, includes a gate dielectric layer overlying an upper surface of a semiconductor substrate and first and second gate electrodes overlying the gate dielectric layer. The first gate electrode is laterally positioned overlying a first region of the substrate. The first substrate region has a first type of doping, which may be either n-type or p-type. A second gate electrode of the power transistor overlies the gate dielectric and is laterally positioned over a second region of the substrate. The second substrate region has a second doping type that is different than the first type. The transistor further includes a drift region located within the substrate in close proximity to an upper surface of the substrate and laterally positioned between the first and second substrate regions.

REFERENCES:
patent: 6825531 (2004-11-01), Mallikarjunaswamy
patent: 7229873 (2007-06-01), Colombo et al.
patent: 7608513 (2009-10-01), Yang et al.
patent: 2001/0011747 (2001-08-01), Emmerik et al.
patent: 2002/0053695 (2002-05-01), Liaw et al.
patent: 2005/0067655 (2005-03-01), Shibib et al.
patent: 2006/0024897 (2006-02-01), Beasom
patent: 2006/0113601 (2006-06-01), Shibib et al.
PCT Application No. PCT/US2009/033181; International Search Report and Written Opinion; mailed Aug. 26, 2009.

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