Semiconductor memory apparatus

Static information storage and retrieval – Read/write circuit – Signals

Reexamination Certificate

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C365S194000

Reexamination Certificate

active

07969800

ABSTRACT:
A semiconductor memory apparatus includes a row path activating unit configured to generate a line connection control signal according to a received address and active command. The semiconductor memory apparatus also includes a cell array circuit unit including an input/output line switch for connecting a first input/output line in a cell block and a second input/output line extending to the outside of the cell block. The cell array also including a bit line switch for connecting a bit line pair to each other. The input/output line switch and the bit line switch are further controlled by the line connection control signal from the row path activating unit.

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patent: 2009/0168588 (2009-07-01), Shim

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