Stacked semiconductor apparatus with configurable vertical I/O

Details Stacked semiconductor apparatus with configurable vertical I/O Stacked semiconductor apparatus with configurable vertical I/O

2011-08-02

2011-08-02

Hollington, Jermele M (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

Reexamination Certificate

active

07990171

ABSTRACT:
The present invention provides an apparatus including a stacked plurality of devices and a related method. The apparatus includes a stacked plurality of devices including a master device and at least one secondary device; a plurality of segments, each segment being associated with one of the stacked plurality of devices; and a plurality of N vertical connection paths traversing the stacked plurality of devices. The apparatus further includes a plurality of M vertical signal paths configured from the plurality of N vertical connections paths, wherein M is less than N, and at least one of the plurality of M vertical signal paths is a merged vertical signal path adaptively configured by the master device using at least one segment from each one of at least two of the plurality of N vertical connection paths.

REFERENCES:
patent: 6788070 (2004-09-01), Ishigaki
patent: 6876221 (2005-04-01), Ishigaki
patent: 7489030 (2009-02-01), Shibata et al.
patent: 7737540 (2010-06-01), Choi
patent: 7830692 (2010-11-01), Chung et al.
patent: 2003/0020171 (2003-01-01), Dutta et al.
patent: 2007/0132085 (2007-06-01), Shibata et al.
patent: 2009/0039492 (2009-02-01), Kang et al.
patent: 2009/0079463 (2009-03-01), Conn
patent: 2009/0085599 (2009-04-01), Choi et al.
patent: 2009/0091962 (2009-04-01), Chung et al.
patent: 2009/0153177 (2009-06-01), Shibata
patent: 2009/0319703 (2009-12-01), Chung
patent: 2010/0020583 (2010-01-01), Kang et al.
patent: 2010/0213593 (2010-08-01), Lee et al.
patent: 2011/0044084 (2011-02-01), Chung et al.

Affiliated with

Also associated with

Rating

Stacked semiconductor apparatus with configurable vertical I/O does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Stacked semiconductor apparatus with configurable vertical I/O, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Stacked semiconductor apparatus with configurable vertical I/O will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2720786