Methods of forming field effect transistors having silicided...

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate

Reexamination Certificate

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C438S783000, C438S791000, C438S795000, C257S368000, C257S382000, C257S384000

Reexamination Certificate

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07863201

ABSTRACT:
Methods of forming integrated circuit devices according to embodiments of the present invention include forming a PMOS transistor having P-type source and drain regions, in a semiconductor substrate, and then forming a diffusion barrier layer on the source and drain regions. A silicon nitride layer is deposited on at least portions of the diffusion barrier layer that extend opposite the source and drain regions. Hydrogen is removed from the deposited silicon nitride layer by exposing the silicon nitride layer to ultraviolet (UV) radiation. This removal of hydrogen may operate to increase a tensile stress in a channel region of the field effect transistor. This UV radiation step may be followed by patterning the first and second silicon nitride layers to expose the source and drain regions and then forming silicide contact layers directly on the exposed source and drain regions.

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Miyagawa et al., “Local Bonding Structure of High-Stress Silicon Nitride Film Modified by UV Curing for Strained Silicon Technology beyond 45nm Node SoC Devices,” Japanese Journal of Applied Physics, 46 (2007) pp. 1984-1988.
Sun et al, “Suppression of Cobalt Silicide Agglomeration Using Nitrogen (N+2) Implantation,” IEEE Electron Device Letters, vol. 19, No. 5, May 1998, pp. 163-166.

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