Multi-serial interface stacked-die memory architecture

Details Multi-serial interface stacked-die memory architecture Multi-serial interface stacked-die memory architecture

2011-07-12

2011-07-12

Phan, M. (Department: 2475)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S464000, C365S158000, C711S111000, C711S154000, C711S171000

Reexamination Certificate

active

07978721

ABSTRACT:
Systems and methods disclosed herein substantially concurrently transfer a plurality of streams of commands, addresses, and/or data across a corresponding plurality of serialized communication link interfaces (SCLIs) between one or more originating devices or destination devices such as a processor and a switch. At the switch, one or more commands, addresses, or data corresponding to each stream can be transferred to a corresponding destination memory vault controller (MVC) associated with a corresponding memory vault. The destination MVC can perform write operations, read operations, and/or memory vault housekeeping operations independently from concurrent operations associated with other MVCs coupled to a corresponding plurality of memory vaults.

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