Resistance change nonvolatile memory device

Details Resistance change nonvolatile memory device Resistance change nonvolatile memory device

2011-04-05

2011-04-05

Yoha, Connie C (Department: 2827)

Static information storage and retrieval

Systems using particular element

Resistive

C365S051000, C365S230030, C365S230040, C365S046000, C365S063000

Reexamination Certificate

active

07920408

ABSTRACT:
Memory cells (MC) are formed at intersections of bit lines (BL) extending in the X direction and word lines (WL) extending in the Y direction. A plurality of basic array planes sharing the word lines (WL), each formed for a group of bit lines (BL) aligned in the Z direction, are arranged side by side in the Y direction. In each basic array plane, bit lines in even layers and bit lines in odd layers are individually connected in common. Each of selection switch elements (101to104) controls switching of electrical connection
on-connection between the common-connected even layer bit line and a global bit line (GBL), and each of selection switch elements (111to114) control switching of connection
on-connection between the common-connected odd layer bit line and the global bit line (GBL).

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