Flash memory device and fabricating method thereof...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S330000, C257S466000, C257S496000, C257S321000, C257SE29200, C257SE29309, C257SE29300, C438S259000

Reexamination Certificate

active

07872297

ABSTRACT:
The present invention relates to a flash memory device and its fabrication method. The device comprises a structure for improving a scaling-down characteristic/performance and increasing memory capacity of the MOS-based flash memory device. A new device structure according to the present invention is based on a recessed channel capable of implementing highly-integrated/high-performance and 2-bit/cell. The proposed device suppresses the short channel effect, reduces the cell area, and enables 2-bit/cell by forming the charge storage node as a spacer inside the recessed channel. Moreover, if selectively removing the dielectric films around the recessed silicon surface, the sides as well as the surface of the recessed channel is exposed. A spacer can be used as a storage node, thereby improving the channel controllability of the control electrode and the on-off characteristic of a device. The proposed structure also resolves the threshold voltage problem and improves the write/erase speeds.

REFERENCES:
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English language Abstract of KR 10-0458288.
Eitan et al., “NROM: A novel localized trapping, 2-bit nonvolatile memory cell”, IEEE Electron Devices, vol. 21, No. 11, pp. 543-585, 2000.
Fukuda et al., “Scaled 2 bit/cell SONOS type nonvolatile memory technology for sub-90 nm embedded application using SiN sidewall trapping structure”, IEDM Tech. Dig., pp. 909-912, 2003.
Choi et al., “Highly scalable and reliable 2-bit/cell SONOS memory transistor beyond 50 nm NVM technology”, Symposium on VLSI Technology Dig., pp. 118-119, 2005.

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