Display panel

Details Display panel Display panel

2011-01-04

2011-01-04

Dinh, Duc Q (Department: 2629)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C345S090000, C345S100000, C345S087000

Reexamination Certificate

active

07864149

ABSTRACT:
In a display panel, main and sub pixel electrodes are connected to first and second drain electrodes of a thin film transistor, respectively, to receive a data voltage during a 1 H period as main and sub pixel voltages. A main storage electrode overlaps the main pixel electrode to receive a first common voltage that varies with the gate pulse and the polarity of the data voltage. A sub storage electrode overlaps the sub pixel electrode to receive a second common voltage that is uniformly maintained at a constant voltage level. The sub pixel voltage is uniformly maintained by the second common voltage, but the main pixel voltage is shifted up or down by the first common voltage. Thus, the main pixel voltage may have a voltage level higher than that of the sub pixel voltage.

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