Parity check matrix generation method, data transmission...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S755000, C714S804000

Reexamination Certificate

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07908539

ABSTRACT:
A method that allows the easy generation of low-density parity-check codes that can realize superior error-correcting characteristics. A processor (50) of a transmission line encoder constructs parity check matrix H from partial matrix H1of m rows and k columns on the left side and partial matrix H2of m rows and m columns on the right side. The processor (50) generates partial matrix H2as a unit matrix. The processor (50) generates partial matrix H1to satisfy the conditions that, when any two rows contained in partial matrix H1are selected, the two rows have periods that are relatively prime, or when the periods are identical, the two rows have different phases. The processor (50) then joins partial matrix H1and partial matrix H2to generate parity check matrix H.

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