Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2011-01-25
2011-01-25
Kim, Hong (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S156000
Reexamination Certificate
active
07877555
ABSTRACT:
Logical memories and other logic functions specified in designs are mapped to power-optimized implementations using physical memories and other device resources. A logical memory may be automatically mapped to numerous potential physical implementations. Power consumption is estimated for each potential physical implementation to select the physical implementation providing the best performance with respect to power consumption and any other design constraints. Potential physical implementations can suppress clock transitions via clock enable inputs when embedded memory is not accessed. Read-enable and write-enable signals can be converted to functionally equivalent clock enable signals. Clock enable signals can be created to deactivate unused memory access ports and to deactivate embedded memory blocks during don't-care conditions. Potential physical implementations can slice logical memory into two or more embedded memory blocks to minimize power consumption.
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Betz Vaughn
Golpalsamy Thiagaraja
Neto David
Tessier Russell George
Altera Corporation
Dinh Ngoc V
Kim Hong
Ropes & Gray LLP
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